Distance & Continuing Education
Missouri University of Science and
Technology
300 W 12th Street
216 University Center
Rolla, MO 65409-1560
Phone: 573-341-6222
Fac: 573-341-4992
dce@mst.edu

Circuit Board Layout:

To reduce interference and improve signal integrity

Presented by Dr. Tom Van Doren

 

Course Content and Schedule

8:00 am Check-in and Refreshments
8:30 am to 5:00 pm

1. Introduction

  • Circuit board EMC problem areas
  • EMC design guidelines
  • References
  • A circuit board in a plastic case
  • An example of radiated emissions

2. Signal Routing, Field Containment, and Resonance

  • Controlling the current path
  • Concept of least impedance
  • Routing to contain electric and magnetic fields
  • Understanding the effects of resonance on signal integrity and emissions
  • Identifying the radiation source on a dual processor circuit board
  • Reducing emissions from a laptop computer

3. Transmission Line Effects

  • When is a line electrically long?
  • Source versus load matching
  • Selecting the optimum Zο value
  • Demonstration of impedance mismatch

4. Noise Coupling Mechanisms, Unintended Antennas, and Diagnostic Techniques

  • Review of energy coupling mechanisms
  • Identifying unintended antennas
  • Example boards with unintended antennas
  • Using current and field probes to diagnose EMI problems
  • Controlling the path of large amplitude, low frequency currents

5. Filtering Conducted Noise

  • Series and shunt filter strategies
  • Effect of source and load impedances on selecting the correct strategy
  • Reducing the mutual inductance of shunt mounted capacitors
  • Examples of filtering at board connectors
  • Characteristics of ferrite beads

6. Circuit Board Grounding Issues

  • Reasons for grounding
  • Understanding the differences between grounding and routing
  • Grounding an A/D converter
  • How to ground a circuit board to an external metal chassis
  • Examples of board to chassis grounding connections

7. DC Power Distribution and Decoupling

  • Power current paths for single-ended and differential signaling
  • Maximizing power bus interplane capacitance
  • Minimizing decoupling capacitor connection inductance
  • Using stripline power routing to contain field

8. Component Placement and Layer Stackup

  • Connector locations and pin assignments
  • Stackup options for 4, 6, and 8 layer boards